校際選修

115-1 選課時程

進行中

  • 初選第一階段 6/15/2026
  • 初選第二階段 6/22/2026
  • 校際選修 8/24/2026
  • 初選第三階段 8/31/2026
  • 開學後加退選 9/7/2026
  • 逾期加退選 9/21/2026
選課資源

類比積體電路導論

Introduction to Analog Integrated Circuits

學期
106-1
學分
3 學分
當期課號
1051
永久課號
DEE4638
開課單位
電子工程學系
授課教師
吳重雨
校區
光復
類別
選修
上課時間表
週一
週四
3
10:10–11:00
類比積體電路導論
ED116
2 節連堂
4
11:10–12:00
7
15:30–16:20
類比積體電路導論
ED116

* 根據陽明交大上課時間表所列

概述

This is a one semester course on the analysis and design of analog integrated circuits. The course contents cover device physics to elementary circuits and operational amplifiers design, especially emphasized on CMOS technology. 電子工程學系希望培育學生具備十項核心能力及三項基本素養(請參官網http://www.ee.nctu.edu.tw首頁之【學術研究】→【IEET】內容。 ※本課程將培育學生具備下述幾項核心能力: 1.2 電子、資訊領域相關專業知識與能力 1.3 電子、資訊領域之實作技術,並具有發掘、分析、解決問題及創新的能力 1.4 科技寫作與簡報能力及培養持續學習的習慣與能力 2.3 溝通、表達與團隊合作之能力 3.1 瞭解國內外電子資訊產業脈動 ※本課程將培育學生具備下述幾項基本素養: 1 養成學生具備電子工程基礎與專業知識,並配合實作,達到理論與實務相結合之目的。使學生具備推論、分析、創新及整合能力。 2 教育學生具備寬廣之知識、溝通技巧與團隊精神,以迎接不同生涯發展之挑戰。教育學生瞭解專業倫理及社會責任。 3 建立國際化學習環境,使學生洞察國內外社會與產業之脈動,以培養學生成為立足於全球之電子菁英與領袖人才。

先修科目

Microelectronics (I)-(II)

教學方式

Office Hours: Thu 11:00 am – 12:00 pm, ED307 and by email appointment. TA: 王嵩皓 Sean Wang Email: seanjhjh@gmail.com 黃其暐 Chi-Wei Huang Email: rex.chiwei@gmail.com Web Page:E3平台

評分方式

Homework 20% Midterm I 20% Midterm II 20% Final Exam 20% Final Project 20%

週次計畫
週次主題
第 1 週CMOS Process Technology: Process Flow Reading (18.1~18.6)
第 1 週CMOS Process Technology: Process Flow
第 2 週No Class (Will be made up) Introduction to HSPICE by TA Reading (18.6~18.8)
第 2 週CMOS Process Technology: Process Flow CMOS Process Technology: Resistor, Capacitor, Layout
第 2 週Make-up Class MOS Device Physics and Models: General Consideration, I/V Characteristics, MOS Device Models Reading (2.1~2.4)
第 3 週Make-up Class Differential Amplifiers: Single-Ended and Differential Operation, Basic Differential Pairs, Common-Mode Response, Differential Pair with PMOS Load Reading (4.1~4.4)
第 3 週MOS Device Physics and Models: Scaling Theory
第 3 週MOS Device Physics and Models: Short-Channel Effects
第 4 週Differential Amplifiers: Gilbert Cell Reading (4.5)
第 4 週Frequency Response of Amplifiers: General Considerations, CS Stage, Source Followers, CG/Cascode Stages, Differential Pair Reading (6.1~6.6)
第 5 週Operational Amplifiers: General Considerations, One-Stage OP Amps, Two-Stage OP Amps, Gain Boosting, Comparisons, Common-Mode Feedback Reading (9.1~9.6)
第 5 週National Holiday, No Class(Will be made up)
第 6 週Operational Amplifiers: Input Range Limitations, Slew Rate, Power Supply Rejection Reading (9.7~9.9)
第 6 週Stability and Frequency Compensation: General Considerations, Multipole Systems Reading (10.1~10.2)
第 7 週No Class(Will be made up)
第 7 週No Class(Will be made up)
第 8 週Stability and Frequency Compensation: Phase Margin Reading (10.3)
第 8 週Midterm I (11/2 Thursday 10:10-12:00 am)
第 9 週Stability and Frequency Compensation: Frequency Compensation, Compensation of Two-Stage OP Amp Reading (10.4~10.5)
第 9 週Stability and Frequency Compensation: Frequency Compensation, Compensation of Two-Stage OP Amp
第 10 週Stability and Frequency Compensation: Other Compensation Techniques Reading (10.6)
第 10 週Noise: Statistical Characteristics of Noise, Types of Noises, Representation of Noise in Circuits Reading (7.1~7.3)
第 11 週Noise: Noise in Single-Stage Amplifiers, Noise in Differential Pairs, Noise Bandwidth Reading (7.4~7.6)
第 11 週Noise: Noise in Single-Stage Amplifiers, Noise in Differential Pairs, Noise Bandwidth
第 12 週Operational Amplifiers: Noise in OP Amps Reading (9.10)
第 12 週Bandgap References: General Considerations, Supply Independant Biasing, Temperature-Independant References. Reading (12.1~12.3)
第 13 週Bandgap References : PTAT Current Generation Constant-Gm Biasing, Speed and Noise Issues, Case Study Reading (12.4~12.7)
第 13 週Bandgap References : PTAT Current Generation Constant-Gm Biasing, Speed and Noise Issues, Case Study
第 14 週Switched-Capacitor Circuits: General Consideration, Sampling Switches Reading (13.1, 13.2)
第 14 週Midterm II (12/14 Thursday 10:10-12:00 am)
第 15 週Switched-Capacitor Circuits: Sampling Switches, Switched-Capacitor Amplifiers Reading (13.2, 13.3)
第 15 週Switched-Capacitor Circuits: Sampling Switches, Switched-Capacitor Amplifiers
第 16 週Switched-Capacitor Circuits: Switched-Capacitor Integrator, SC Common-Mode Feedback Reading (13.4, 13.5)
第 16 週Switched-Capacitor Circuits: Switched-Capacitor Integrator, SC Common-Mode Feedback
第 17 週National Holiday, No Class
第 17 週Nonlinearity and Mismatch: Mismatch Reading (14.2)
第 18 週Final Exam (1/11, Thursday 9:30am - 12:30pm, 3-Hour Exam)
第 18 週Review, No Class
教科書

1.“Design of Analog CMOS integrated circuits”, Behzad Razavi, McGraw Hill, 2001. 2.“CMOS Analog Circuit Design”, Phillip E. Allen, Douglas E. Holberg, Oxford, 2002.

Office Hours
地點
ED537
時間
Wed 15:20-17:00 Fri 15:20-17:00
聯絡方式
Email:peterwu@mail.nctu.edu.tw Phone:54148