記憶體積體電路

(1) The first part of the course focuses on the SRAM. The evolution of semiconductor devices, materials, and emerging device structures are introduced, followed by the basics on SRAM cell and pheripheral circuit design. We then discuss the design challenges and techniques of high-performance SRAM in the "End of Scaling” nanoscale CMOS technologies. The impacts of technology scaling, such as signal loss due to leakage, degradation of noise margin due to Vt scatter caused by process variations and random dopant fluctuation, and long term reliability degradation such as NBTI/PBTI, are addressed. Design directions and leakage/variation/degradation tolerant SRAM circuit techniques to mitigate various performance and reliability constraints in conventional planar CMOS technology are discussed and examples are given and merits discussed. Alternative cell structures, such as asymmetrical SRAM, 7T, and 8T SRAMs, which decouple the cell storage node from the Read-disturb and half-select disturb to improve the static noise margin (SNM) are discussed. Finally, some design issues and opportunities in advanced technologies such as FD/SOI and multi-gate FinFET are illustrated. (2) The second part of the course deals with ultra-low-voltage SRAM design for sub-threshold operation for emerging bio-medical, embedded medical instruments, and wireless body sensing network applications. State-of-the-art design from recent international conferences and journals will be discussed. (3) The third part of the course covers the basics of DRAM, NVRAM, MRAM, STT (Spin-Torque-Transfer) RAM, PRAM (or PCM, Phase-Change-Memory), and RRAM (Resistive RAM). It is intended to introduce the students to the basic idea, cell structure, and sensing schemes of these memories. 電子研究所希望培育學生具備十項核心能力及三項基本素養(請參官網http://www.ee.nctu.edu.tw首頁之【學術研究】→【IEET】內容。 ※本課程將培育學生具備下述幾項核心能力: 1.1 固態電子或電路系統相關專業知識之能力 1.2 固態電子或電路系統之設計、實驗及分析數據之能力,並具有發掘、分析、獨立解決問題及創新思考的能力 3.1 瞭解國內外電子資訊產業脈動 3.2 中英文科技論文之閱讀寫作與簡報能力 ※本課程將培育學生具備下述幾項基本素養: 1 養成學生具備電子工程基礎與專業知識,並配合實作,達到理論與實務相結合之目的。使學生具備推論、分析、創新及整合能力。

(1) Semiconductor Devices (2) Digital CMOS Circuits (3) Some knowledge in semiconductor process technology

作業部份: Each student is expected to choose a topic relating to memory in the middle of the semester. The topic can be process, technology, devices, cells, circuit, reliability, etc., as long as it is pertinent and crucial to memory design. The student is expected to do extensive literature search and reading, and to summarize the status, trend, issues, and possible future directions in a report written in English due at end of the semester 考試部份: Each student is expected to give a PowerPoint presentation (preferably in English) (30 minutes + Q/A) on his/her selected topic at the end of semester. The written report (in Word, English) on the selected topic is due at end of the semester. 評量部份: Grading Criteria based on: (1) Ability to understand and summarize the current status (2) Ability to identify the trend, and possible future directions and works (3) Writing capability to convey thoughts (4) Presentation clarity, style and Q/A handling

No textbook. The class materials are mainly based on papers published at international conferences and journals in recent years, supplemented with materials from invited tutorials and/or short courses that the professor gave at international conferences and workshops. All materials will be distributed and posted in the web as well.

地點

Room 403, Engineering Building 4

時間

Office Hour: Thursday, 10:00-11:00 AM

聯絡方式

Tel: 03-571-2121 x 54122 (office) 0914-003596 (Cell) E-Mail: ctchuang@mail.nctu.edu.tw chingte.chuang@gmail.com