校際選修

115-1 選課時程

進行中

  • 初選第一階段 6/15/2026
  • 初選第二階段 6/22/2026
  • 校際選修 8/24/2026
  • 初選第三階段 8/31/2026
  • 開學後加退選 9/7/2026
  • 逾期加退選 9/21/2026
選課資源

VLSI數位訊號處理架構設計

VLSI Digital Signal Processing

學期
106-1
學分
3 學分
當期課號
5239
永久課號
IOC5059
開課單位
資訊科學與工程研究所
授課教師
范倫達
校區
光復
類別
選修
上課時間表
週一
A
18:30–19:20
VLSI數位訊號處理架構設計
ED305
3 節連堂
B
19:30–20:20
C
20:30–21:20

* 根據陽明交大上課時間表所列

概述

Good understanding and design experience of VLSI signal processing algorithms and architecture and chips with applications to multimedia-communications systems through ASIC-, processor-, and GPU approaches.

先修科目

數位電路設計導論, 訊號與系統

教學方式

http://viplab.cs.nctu.edu.tw/course/VLSI_DSP2015_Fall.htm Handout is available

評分方式

1. 作業 2. 期中報告 3. 期末計畫

課程大綱
  • Lecture 1: Introduction to Digital Signal Processing Systems
  • Lecture 1: Introduction to Digital Signal Processing Systems
  • Lecture 1: Introduction to Digital Signal Processing Systems
  • Lecture 2: Iteration Bound
  • Lecture 3: Pipelining and parallel processing
  • Lecture 3: Pipelining and parallel processing
  • Lecture 4: Retiming
  • Lecture 5: Unfolding
  • Lecture 5: Unfolding
  • Midterm Reprot
  • Lecture 6: Folding
  • Lecture 7: Algorithmic Strength Reduction in Filters and Transforms
  • Lecture 8: Pipelined and Parallel Recursive and Adaptive Filters
  • Lecture 9: Low-Power CMOS VLSI Design Final Project Planning
  • Lecture 10: Programmable Digital Signal Processors Final Project Execution
  • Lecture 11: Introduction to 3D Graphics Processing Flow Final Project Execution
  • Lecture 12: Introduction to GPU Hardware Final Project Execution
  • Lecture 13: Geometry Subsystem Design Final Project Demo
週次計畫
週次主題
第 1 週Lecture 1: Introduction to Digital Signal Processing Systems
第 2 週Lecture 1: Introduction to Digital Signal Processing Systems
第 3 週Lecture 1: Introduction to Digital Signal Processing Systems
第 4 週Lecture 2: Iteration Bound
第 5 週Lecture 3: Pipelining and parallel processing
第 6 週Lecture 3: Pipelining and parallel processing
第 7 週Lecture 4: Retiming
第 8 週Lecture 5: Unfolding
第 9 週Lecture 5: Unfolding
第 10 週Midterm Report
第 11 週Lecture 6: Folding
第 12 週Lecture 7: Algorithmic Strength Reduction in Filters and Transforms
第 13 週Lecture 8: Pipelined and Parallel Recursive and Adaptive Filters
第 14 週Lecture 9: Low-Power CMOS VLSI Design Final Project Planning
第 15 週Lecture 10: Programmable Digital Signal Processors Final Project Execution
第 16 週Lecture 11: Introduction to 3D Graphics Processing Flow Final Project Execution
第 17 週Lecture 12: Introduction to GPU Hardware Final Project Execution
第 18 週Lecture 13: Geometry Subsystem Design Final Project Demo
教科書

K. K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation. NY: Wiley, 1999. Reference Books: P. Pirsch, Architectures for Digital Signal Processing. NY: Wiley, 1998. ※請修課同學尊重智慧財產權!勿隨意過度影印教科書或使用未經授權之著作權與電腦軟體等。

Office Hours
地點
EC-419R
時間
Friday: CD
聯絡方式
ext 54815