校際選修

115-1 選課時程

進行中

  • 初選第一階段 6/15/2026
  • 初選第二階段 6/22/2026
  • 校際選修 8/24/2026
  • 初選第三階段 8/31/2026
  • 開學後加退選 9/7/2026
  • 逾期加退選 9/21/2026
選課資源

電路與電子學(二)

Electrical Circuits and Electronics (II)

學期
106-2
學分
3 學分
當期課號
1178
永久課號
DCP1231
開課單位
資訊工程學系
授課教師
林正中
校區
光復
類別
選修
上課時間表
週一
週四
3
10:10–11:00
電路與電子學(二)
ED305
2 節連堂
4
11:10–12:00
7
15:30–16:20
電路與電子學(二)
ED305

* 根據陽明交大上課時間表所列

概述

1] on digital circuit modules * understanding how the module functionality is fulfilled by internal operations at the device level * perceiving timing sequence associated with data propagation along internal data paths and device-switching propagation accompanied 2] on analog circuits * understanding the operations of single-staged amplifiers, ability of circuit analysis if feasible * OPAMPs: - OPAMP-circuit for various applications - internal structure and signal propagation

先修科目

prerequisite preferred, but not necessary 1] RLC-circuit analysis in frequency domain 2] basic filtering operations

教學方式

class attendance: 1] Constant presence in class sessions is essential, though not enforced; 2] Interactions in class sessions by raising or answering questions, providing perspectives toward issues on specific subjects under discussions, etc., are highly encouraged and regarded;

評分方式

grading policy: 1] home work exercises will be assigned, but will not be part of the grading; 2] * written tests will be given every other week or at due time when a subject of the course is imparted; * best scores of the tests, say 4 out of 7 in a semester, will be considered with equal wights in the final grade evaluation,

週次計畫
週次主題
第 1 週* essential concepts required in circuit analysis * semiconductor ABC * physics at PN junction (1)
第 2 週* physics at PN junction (2) * diodes and diode circuits
第 3 週* MOSFETs - NMOS (physics and v-i characteristics)
第 4 週* MOSFETs - PMOS (physics and v-i characteristics)
第 5 週* CMOS (v-i characteristics)
第 6 週* inverters with NMOS/PMOS/CMOS
第 7 週* basic logic gates with NMOS/PMOS/CMOS * multi-level logic with MOS devices
第 8 週* FF/latches with MOS devices
第 9 週* more on CMOS logic – domino-structure – common functional blocks in digital system (1)
第 10 週– common functional blocks in digital system (2) * transmission gates
第 11 週* PLAs * memory cells (1)
第 12 週* memory cells (2)
第 13 週* MOS devices as amplifying components (1)
第 14 週* MOS devices as amplifying components (2)
第 15 週* input stage of an OPAMP: the differential amplifiers
第 16 週* waveform generating circuit (1)
第 17 週* waveform generating circuit (1)
第 18 週no class
教科書

reading assignment: 1] "Microelectronics - Circuit Analysis and Design -", by Donald A. Neamen; McGrawHill, latest Ed. Chap.: 1, 2, 3, 5* [physics / devices] 16, 17 [gates and above] 4, 6*, [single-stage amplifiers] [2] "陳龍英的電子學(一),(二),(三)", by 陳龍英教授; NCTU, Office of Publication Chap." 1, 3, 4*, 5, 14, 12**, 16 [3] "Digital Integrated Circuits - A Design Perspective -", by Rabaey, Chandrakasan and Nikolic; Prentice Hall, latest Ed. Chap.: 3, 5, 1, 6, 7, 11, 12, 4, 9 [wire / interconnect] [4] supplemental teaching materials will be offered in forms of hand-out or files

Office Hours
地點
1] ED305 2] EC416 (lecturer's office)
時間
1] during the class sessions 2] by appointment ahead
聯絡方式
1] drop-by the office during the office hours (1300-1730 recommended) 2] by phone at ext,# 54711 by e-mail at cclin@cs,nctu.edu.tw 3] class attending