低功率積體電路設計

Low-power circuit design is one of the critical design challenges for high-performance computing, mobile devices, IoT devices and biomedical applications. Thus, the goal of this course is to introduce low-power design techniques of nano-scale ICs from circuit-level, architecture-level to system-level, particularly emphasizing on low-voltage design. Currently, low-voltage design has been attracted huge attention from the industry of IC design. Additionally, advanced AI-related circuits will be also discussed in this course.

Electronics, VLSI Design

https://sites.google.com/site/nctueecslab/

1. Class Participation (10% ) 2. Exercises (20% ) 3. Midterm Proposal for your final report (15% ) 4. Final Exam (20% ) 5. Final Project Presentation (10% ) 6. Final Project Report (25% )

• Introduction to low power IC design
• Overview of nano-scale CMOS digital circuits
• Power reduction techniques
• Energy-efficient architecture
• Low-voltage design
• Power management
• Low-power memory circuits and memory systems
• Timing control for low-power Circuits
• Variation-tolerant circuit design
• Advanced AI-related circuits and architectures
• Low-power design methodology and I/O interface

1. Class notes 2. Digital Integrated Circuits, by Jan M. Rabaey, Anantha Chandrakasan and Borivoje Nikolic 3. Integrated circuit design, by Neil Weste and David Harris

地點

MIRC 301

時間

After class or by appointment

聯絡方式

By email