CMOS元件,可靠度及應用之特論

Course outline: Overview of CMOS technology Evolution – past, present, and future Device Physics and Techniques: Review of fundamentals: C. Hu’s textbook: Chap.1,2,4,5,6,7 (~1/2 time) Tunneling: FN and DT  HK/MG gate stack Strain engineering Layout proximity effects Hot carrier effects : mechanisms, damage (Qit and Qot), and lifetime extraction -- Local field Emax model -- CHE created Isub and Ig  -- Improvement methodology: Emax reduction Location and overlap of Emax Gate oxide quality improvement Memory Technologies (SRAM, DRAM, NVM)

must have taken at least one entry-level semiconductor device related course preferred to have taken: solid-state physics, and/or quantum mechanics

Homework 5% mid-term exam 45% final exam 45% attendence and in-class responses 5%

"Modern Semiconductor Devices for Integrated Circuits" by Chenming Calvin Hu

地點

classroom assigned

時間

prior to class begin, or during breaks

聯絡方式

ic_chen@umc.com or ic.chen.tx@gmail.com