類比積體電路
Analog Integrated Circuits
| 節 | 週一 | 週四 |
|---|---|---|
3 10:10–11:00 | 類比積體電路 ED220 2 節連堂 | |
4 11:10–12:00 | ||
7 15:30–16:20 | 類比積體電路 ED220 |
* 根據陽明交大上課時間表所列
This is a course on the analysis and design of MOSFET analog integrated circuits. Topics include: Device models and IC technologies, Elementary gain stages, Current mirrors and reference generators, Output stages, Noise analysis and modeling, Feedback and frequency compensation, Operational amplifiers.
Microelectronics, Circuit theories, Introduction to analog integrated circuits
Reference : 1. Tony Chan Carusone, David Johns and Kenneth Martin, “Analog Integrated Circuit Design,” John Wiley & Sons, Inc. 2013. 2. Phillip E. Allen and Douglas R. Holberg, “CMOS Analog Circuit Design,” 2nd Edition, Oxford University Press, 2002. 3. Behzad Razavi, “Design of Analog CMOS Integrated Circuits,” McGraw-Hill, 2001. 4. R. Jacob Baker, HarryW. Li, and David E. Boyce, “CMOS Circuit Design, Layout, and Simulation,” IEEE Press, 1998.
midterm exam 30%, Final exam 30%. Homework 30%, Project 10%.
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction. |
| 第 2 週 | Device Models |
| 第 3 週 | IC processing and layout. |
| 第 4 週 | Single-transistor gain stages. |
| 第 5 週 | Multiple-transistor gain stages. |
| 第 6 週 | Dierential gain stages. |
| 第 7 週 | Current mirrors and active loads. |
| 第 8 週 | Midterm exam |
| 第 9 週 | Reference generators |
| 第 10 週 | Output stages |
| 第 11 週 | Noise analysis and modeling |
| 第 12 週 | Feeback |
| 第 13 週 | Compensation |
| 第 14 週 | Basic two stage operational amplifiers |
| 第 15 週 | Operational amplifiers with single ended output |
| 第 16 週 | Fully differential amplifiers |
| 第 17 週 | Design review |
| 第 18 週 | Final exam |
Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, and Robert G. Meyer, “Analysis and Design of Analog Integrated Circuits,” 5th Edition, John Wiley & Sons, Inc. 2010.
- 地點
- ED 643
- 時間
- By appointment
- 聯絡方式
- wzchen@mail.nctu.edu.tw