數位電路設計
Digital Circuit Design
學期
109-1
學分
3
學分
當期課號
2109
永久課號
SET1049
開課單位
系統工程與科技學士學位學程
授課教師
系統工程與科技學程
類別
必修
上課時間表
| 節 | 週三 |
|---|---|
2 09:00–09:50 | 數位電路設計 3 節連堂 |
3 10:10–11:00 | |
4 11:10–12:00 |
* 根據陽明交大上課時間表所列
概述
創新與運用資訊科技及數學知識的能力。 執行資訊科技實務所需技術、技巧及使用工具的能力。 發掘、分析及處理問題的能力。
先修科目
無
週次計畫
| 週次 | 主題 |
|---|---|
| 第 1 週 | 1. Ch1.Digital System and Information • Information Representation • Number Systems [binary, octal and hexadecimal] • Arithmetic Operations • Base Conversion • Decimal Codes [BCD (binary coded decimal)] • Alphanumeric Codes • Parity Bit • Gray Codes |
| 第 2 週 | 2. Ch2.Combinational Logic Circuits-Part 1 – Gate Circuits and Boolean Equations • Binary Logic and Gates • Boolean Algebra • Standard Forms |
| 第 3 週 | 3. Ch2.Combinational Logic Circuits-Part 2 – Circuit Optimization • Two-Level Optimization • Map Manipulation • Practical Optimization (Espresso) • Multi-Level Circuit Optimization |
| 第 4 週 | 4. Ch2.Combinational Logic Circuits-Part 3 – Additional Gates and Circuits • Other Gate Types • Exclusive-OR Operator and Gates • High-Impedance Outputs |
| 第 5 週 | 5. Ch3.Combinational Logic Design-Part 1 – Design Procedure ■ Steps • Specification • Formulation • Optimization • Technology Mapping ■ Technology Mapping - AND, OR, and NOT to NAND or NOR ■ Verification • Manual • Simulation |
| 第 6 週 | 6. Ch3.Combinational Logic Design-Part 2 – Combinational Logic ■ Functions and functional blocks ■ Rudimentary logic functions ■ Decoding using Decoders • Implementing Combinational Functions with Decoders ■ Encoding using Encoders ■ Selecting using Multiplexers • Implementing Combinational Functions with Multiplexers |
| 第 7 週 | 7. Ch4.Arithmetic Functions and HDLs ■ Binary adders ■ Binary subtraction ■ Binary adder-subtractors |
| 第 8 週 | 8. Ch5.Sequential Circuits-Part 1 - Storage Elements and Analysis ■ Introduction to sequential circuits ■ Types of sequential circuits ■ Storage elements ■ Sequential circuit analysis |
| 第 9 週 | 9. Ch5.Sequential Circuits-Part 2- Sequential Circuit Design ■ Specification ■ Formulation ■ State Assignment ■ Flip-Flop Input and Output Equation Determination ■ Verification |
| 第 10 週 | 10.Ch5.Sequential Circuits-Part 3 – State Machine Design ■ Issues with traditional state diagrams and table representations ■ The state machine diagram model ■ Constraint checking ■ State machine diagram application and design |
| 第 11 週 | 11. Ch6.Selected Design Topics-Part 1 – The Design Space ■ Integrated Circuits ■ CMOS Circuit Technology |
| 第 12 週 | Ch6.Selected Design Topics- Part 2 Propagation Delay and Timing |
| 第 13 週 | Ch6.Selected Design Topics- Part 3 Asynchronous Interactions |
| 第 14 週 | Ch6.Selected Design Topics- Part 4 Programmable Implementation Technologies |
| 第 15 週 | Ch7.Registers and Register Transfers- Part 1 Registers |
| 第 16 週 | Ch7.Registers and Register Transfers- Part 2 Counters, Register Cells, Buses, & Serial Operations |
| 第 17 週 | Ch7.Registers and Register Transfers- Part 3 Control of Register Transfers |
| 第 18 週 | Ch8.Memory Basics Memory definitions ■ Random Access Memory (RAM) ■ Static RAM (SRAM) integrated circuits ■ Arrays of SRAM integrated circuits ■ Dynamic RAM (DRAM) integrated circuits ■ DRAM Types ■ Arrays of DRAM integrated circuits |
教科書
自編講義