智慧系統研究模組
Intelligent System Modules
| 節 | 週三 | 週四 |
|---|---|---|
2 09:00–09:50 | 智慧系統研究模組 CM218 3 節連堂 | |
3 10:10–11:00 | ||
4 11:10–12:00 | ||
5 13:20–14:10 | 智慧系統研究模組 CM218 2 節連堂 | |
6 14:20–15:10 |
* 根據陽明交大上課時間表所列
Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋): 介紹仿生憶電腦元件與熱電轉換機制與元件模擬 Unit 2_實現AI建模與落地(郭柏村): Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏): Introduction to large-scale hypergraph and circuit partitioning, and classic 2-way and k-way partitioning algorithms Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏): Introduction to the corner-stitching data structure with applications to polygon rectangularization, path finding, open-net detection, and routing in VLSI layouts
Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋): 線性代數、微分方程、固態物理 Unit 2_實現AI建模與落地(郭柏村): Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏): C/C++ programming in Linux, Data structures, Algorithms Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏): C/C++ programming in Linux, Data structures, Algorithms
Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋): 課堂講授、投影片 Unit 2_實現AI建模與落地(郭柏村): Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏): 課堂講授、投影片 Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏): 課堂講授、投影片
Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋): 作業成績 30%、平時成績 40%、小測驗 30% Unit 2_實現AI建模與落地(郭柏村): Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏): 作業成績 50%、小測驗 50% Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏): 作業成績 50%、小測驗 50%
| 週次 | 主題 |
|---|---|
| 第 1 週 | Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋) 單元主題: DNA仿生材料的憶電阻特性與運作機制 課程內容: 介紹DNA仿生材料的憶電阻特性與運作機制 |
| 第 2 週 | Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋) 單元主題:熱電理論與應用介紹 課程內容:介紹熱電機制、理論與應用 |
| 第 3 週 | Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋) 單元主題:熱電理論與應用介紹 課程內容:介紹熱電機制、理論與應用。 |
| 第 4 週 | N/A |
| 第 5 週 | N/A |
| 第 6 週 | N/A |
| 第 7 週 | Unit 2_實現AI建模與落地(郭柏村) 單元主題: Chapter 1 |
| 第 8 週 | Unit 2_實現AI建模與落地(郭柏村) 單元主題: Chapter 1 |
| 第 9 週 | Unit 2_實現AI建模與落地(郭柏村) 單元主題: Chapter 1 |
| 第 10 週 | Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏) 單元主題: Introduction to Hypergraph and Circuit Partitioning |
| 第 11 週 | Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏) 單元主題: 2-way Partitioning 課程內容: KL heuristic, HM heuristic |
| 第 12 週 | Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏) 單元主題: k-way Partitioning 課程內容: hMetis |
| 第 13 週 | Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏) 單元主題: Introduction to VLSI Layouts |
| 第 14 週 | Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏) 單元主題: Introduction to VLSI Layouts |
| 第 15 週 | Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏) 單元主題: Manipulating VLSI layouts using corner stitching |
| 第 16 週 | 期末專題 |
| 第 17 週 | 期末專題 |
| 第 18 週 | 期末專題 |
Unit 1_憶電腦人工智慧與綠能的建模與數值模擬(陳煜璋): N/A Unit 2_實現AI建模與落地(郭柏村): N/A Unit 3_Large-Scale Hypergraph and Circuit Partitioning(林柏宏): Fiduccia; Mattheyses (1982). "A Linear-Time Heuristic for Improving Network Partitions". Design Automation Conference http://glaros.dtc.umn.edu/gkhome/metis/hmetis/publications https://en.wikipedia.org/wiki/Fiduccia–Mattheyses_algorithm Unit 4_Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools(林柏宏): J. K. Ousterhout, "Corner Stitching: A Data-Structuring Technique for VLSI Layout Tools," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 3, no. 1, pp. 87-100, January 1984 http://opencircuitdesign.com/magic/