積分三角訊號轉換器

1. Fundamental of ADCs and review of discrete-time signal processing. 2. Noise-shaping and low-order delta sigma modulators. 2.1 Basic of noise-shaping. 1st-order noise-shaping modulators. 2.2 2nd-order modulators. 3. Design and analysis of higher-order delta sigma ADCs. 3.1 Architecture: feedback vs. feedforward; zero-optimization; stability. 3.2 Single-bit vs. multi-bit; basic of DAC calibration. 3.3 Toolbox and synthesis of delta sigma modulators. 3.4 Decimation filters. 4. Other architectures: multi-stage noise-shaping (MASH), bandpass, hybrid of Nyquist-rate and delta sigma ADCs. 5. Switched-capacitor circuits design of delta sigma ADCs. 5.1 Review of basic switched-capacitor circuits and integrator.5.2 5.2 Circuit non-idealities: noise optimization; opamp finite gain and bandwidth; DAC nonlinearities. 5.3 Switch non-idealities and solutions. 5.4 Implementation of a delta sigma modulator. 6. DAC dynamic element matching (DEM): 6.1 DAC nonlinearities and randomization 課程概述與目標: 1. Fundamental of ADCs and review of discrete-time signal processing. 2. Noise-shaping and low-order delta sigma modulators. 2.1 Basic of noise-shaping. 1st-order noise-shaping modulators. 2.2 2nd-order modulators. 3. Design and analysis of higher-order delta sigma ADCs. 3.1 Architecture: feedback vs. feedforward; zero-optimization; stability. 3.2 Single-bit vs. multi-bit; basic of DAC calibration. 3.3 Toolbox and synthesis of delta sigma modulators. 3.4 Decimation filters. 4. Other architectures: multi-stage noise-shaping (MASH), bandpass, hybrid of Nyquist-rate and delta sigma ADCs. 5. Switched-capacitor circuits design of delta sigma ADCs. 5.1 Review of basic switched-capacitor circuits and integrator.5.2 5.2 Circuit non-idealities: noise optimization; opamp finite gain and bandwidth; DAC nonlinearities. 5.3 Switch non-idealities and solutions. 5.4 Implementation of a delta sigma modulator. 6. DAC dynamic element matching (DEM): 6.1 DAC nonlinearities and randomization 6.2 dynamic weighted average (DWA) for DAC calibration 6.3 other DWA calibrations. 7. Delta Sigma DACs. 7.1 Signal path of a delta sigma DAC. 7.2 Reconstruction filter. 8. Incremental delta sigma ADCs. 9. Continuous-time delta sigma modulators. 10. Final project presentation

本課程要求修課學生參與報告 ( homework & 期末專題), 無法旁聽. 課程第一周會有小考, 測驗課前必備知識. This is an "advanced" course, and you "must" finish the prerequisite courses: 1. advanced analog integrated circuits and switched-capacitor circuits (Ex: ICN5407). 2. analog-to-digital converters (ADC) and digital-to-analog converters (DAC) (Ex: IEE5710). 3. digital signal processing and digital filters (Ex: ICN5611 or IEE7732) 4. You "must" have access to Matlab/Simulink, and Cadence to draw schematics and run circuit simulation, including transient and PSS PAC PNOISE in Cadence SpectreRF. The other prerequisite: 5. basic analog integrated circuits and opamp circuits design (Ex: GEE5101) 6. digital integrated circuits (Ex: IEE7721) or advanced VLSI (Ex: GEE5103)

You "must" be familiar with these tools, and be certain you have the access to these tools: 1. Matlab/Simulink 2. Cadence tools: Composer, Virtuoso and Waveform Viewer 3. Circuits simulation tools: Cadence Spectre, HSPICE 4. Cadence PSS/PAC/PNOISE simulation techniques 5. knowledge of FFT to perform PSD plot

Homework: 20% One Exam: 30% Final project (40%) & presentation (10%): 50%

1. S. Pavan, R. Schreier and G. C. Temes, Understanding Delta-Sigma Data Converters, 2nd Edition, IEEE Press, 2017. 2. F. Maloberti, Data Converters 3. D. Johns and K. Martin, Analog Integrated Circuits Design, 1st or 2nd Ed. 4. Papers from IEEE Journals & Conferences.

地點

EE757

時間

1 GH