校際選修

115-1 選課時程

進行中

  • 初選第一階段 6/15/2026
  • 初選第二階段 6/22/2026
  • 校際選修 8/24/2026
  • 初選第三階段 8/31/2026
  • 開學後加退選 9/7/2026
  • 逾期加退選 9/21/2026
選課資源

記憶體電路及系統設計

Memory Circuits and System

學期
111-2
學分
3 學分
當期課號
535910
永久課號
STST30020
開課單位
國際半導體產業學院碩士班
授課教師
黃柏蒼
校區
光復
類別
選修
上課時間表
週四
5
13:20–14:10
記憶體電路及系統設計
EE102
3 節連堂
6
14:20–15:10
7
15:30–16:20

* 根據陽明交大上課時間表所列

概述

The goal of this course aims to learn the fundamental memory circuits and to gain the basic understanding of hierarchy memory system design methodology. The first part of the course focuses on the embedded-memory circuit design from latches, register file, SRAM, CAM to embedded DRAM and embedded non-volatile memory. We then discuss the design challenges and techniques of high-performance SRAM in nanoscale CMOS technologies. The impacts of technology scaling, such as signal loss due to leakage and degradation of noise margin due to Vt scatter are addressed. Design directions and leakage/variation/degradation tolerant SRAM circuit techniques to mitigate various performance and reliability constraints are discussed and examples are given and merits discussed. Alternative cell structures for low-voltage SRAM. Some design issues and opportunities in advanced technologies are illustrated. The second part of the course covers the basics of DRAM and embedded NVRAM. It is intended to introduce the students to the basic idea, cell structure, and sensing schemes of these memories. The third part of this course is to discuss the hierarchy memory system from the aspect of applications, including memory interface, 3D memory, memory coherence and computation-in-memory.

先修科目

Electronics Circuit Theory Digital IC

評分方式

10% Class participation 60% Exercises 30% Final project

週次計畫
週次主題
第 1 週Introduction to Memory System and Memory Hierarchy
第 2 週Design of Single-Bit Memory (Latch &amp Flip-Flop)
第 3 週SRAM Design – Cell Design
第 4 週SRAM Design – Peripheral Circuits
第 5 週Power Consumption of SRAM
第 6 週Advanced Design Technologies of FinFET SRAM
第 7 週Multi-port memory, FIFO and CAM
第 8 週Fundamental DRAM
第 9 週Fundamental Flash Memory
第 10 週Cache and Scratchpad memory
第 11 週Energy-Efficient Memory Hierarchy for Deep Learning
第 12 週Analog SRAM-based Computation-in-memory circuits
第 13 週Digital SRAM-based Computation-in-memory circuits
第 14 週NVM-based Computation-In-Memory Circuits
第 15 週3D Memory and High-Bandwidth Memory
第 16 週Near-memory Computing
第 17 週
第 18 週
教科書

Class notes on the website, and no textbook. The class materials are mainly based on papers published at international conferences and journals in recent years and supplemented with materials from tutorials. All materials will be distributed and posted in the web as well. Reference Books [1] B. Jacob et al, “Memory Systems- Cache, DRAM and Disk”, Morgan Kaufmann 2008 [2] K Itoh, VLSI Memory Chip Design”, Springer 2001 [3] B Keeth et al, “DRAM Circuit Design: Fundamentals and High Speed Topics”, 2007 [4] G. Campardo et al, “VLSI Design of Non-Volatile Memories”, Springer 2004 [5] C. Kim and H. Lee, “High-Bandwidth Memory Interface”, Springer 2013 [6] Jan M. Rabaey, Anantha Chandrakasan and Borivoje Nikolic, “Digital Integrated Circuits”, 2004

Office Hours
地點
MIRC 301
時間
After class or by appointment
聯絡方式
By email