邏輯設計
Logic Design
| 節 | 週二 | 週五 |
|---|---|---|
3 10:10–11:00 | 邏輯設計 ED220 2 節連堂 | |
4 11:10–12:00 | ||
5 13:20–14:10 | 邏輯設計 ED220 |
* 根據陽明交大上課時間表所列
This is the most fundamental course in Digital Electronics and Computer design and is the first engineering course of electronics, electrical and computer area of NYCU. You will first learn the basic theorems and operations of Boolean algebra: A way to train your logic thinking capability. You will design digital logic circuits and systems and know there are several suitable solutions for different applications. This is an interesting course that you will have home works and projects of real stuff. 電機工程學系希望培育學生具備十項核心能力及三項基本素養。 ※本課程將培育學生具備下述幾項核心能力: 1.2 電子、資訊領域相關專業知識與能力 1.3 電子、資訊領域之實作技術,並具有發掘、分析、解決問題及創新的能力 3.2 具有通過全民英檢中高級初試之能力 ※本課程將培育學生具備下述幾項基本素養: 1 養成學生具備電子工程基礎與專業知識,並配合實作,達到理論與實務相結合之目的。使學生具備推論、分析、創新及整合能力。
essential ability of English reading.
Lecture with power point file provided as class note E3 on line system online course link: 本年度上課以實體為主,如因各種狀況需線上,用以下連結 https://shorturl.at/AORS6 課程錄影 (youtube) https://shorturl.at/mBJ27 邏輯設計 是大一新生的必修課程,所以為了保障新生修課權益,開學後才開放非大一選課。因應人數控管,一律線上選課,不手動加簽。不開放研究生選課。 2021 上課錄影 https://shorturl.at/hsCQ4 2022 上課錄影 https://shorturl.at/gmKW6 logic design in 3 hours https://youtu.be/YjCzXSnrjbY
1. Examination I: 22% 2. Examination II: 23% 3. Home Works: 20% (Optional RTL coding homework, bonus point) 4. Final Examination: 30% (all materials in this semester) 大會考,113/01/09 (Tue) 10:10 to 12:30,實體考試 5. Attending the courses: 5%
| 週次 | 主題 |
|---|---|
| 第 1 週 | Course introductionNumber System and Conversion |
| 第 2 週 | Boolean Algebra |
| 第 3 週 | Algebraic Simplification 9/29 中秋節放假 |
| 第 4 週 | Applications of Boolean Algebra (本單元採非同步上課) |
| 第 5 週 | 10/10 放假 Karnaugh Maps (unit 5) |
| 第 6 週 | 10/17 Midterm Examination I |
| 第 7 週 | Multi-Level Gate Networks NAND and NOR Gates |
| 第 8 週 | Combinational Circuits Design and Simulation Using Gates |
| 第 9 週 | Multiplexers, Decoders, Read-Only Memories, and Programmable Logic Devices |
| 第 10 週 | Latches and Flip-Flops |
| 第 11 週 | Registers and Counters (Unit 12) |
| 第 12 週 | 11/28 Midterm Examination II |
| 第 13 週 | Analysis of Clocked Sequential Networks |
| 第 14 週 | Derivation of State Graphs and Tables |
| 第 15 週 | Reduction of State Tables/State Assignment |
| 第 16 週 | Sequential Circuit Design |
| 第 17 週 | Review (no class) |
| 第 18 週 | Final Examination (whole semester content, (1/9 會考) |
Fundamental of Logic Design, 7th Edition, Charles H. Roth, Jr. and Larry L. Kinney, CENGAGE Learing, 2014 代理商: 滄海書局 TEL: (04) 2708-8787, FAX: (04) 2708-7799
- 地點
- ED406
- 時間
- e-mail first to make an appointment.
- 聯絡方式
- By email: tschang@nycu.edu.tw