計算機架構
Computer Architecture
| 節 | 週五 |
|---|---|
3 10:10–11:00 | 計算機架構 EC115 2 節連堂 |
4 11:10–12:00 |
* 根據陽明交大上課時間表所列
The slowdown of transistor scaling has resulted in diminishing performance improvements in standard computer systems. With the loss of exponentially increasing resources provided by underlying semiconductor scaling, computer architects are facing more challenges in maintaining the growth of computing power. The course begins with the introduction to advanced topics in conventional computer architecture, followed by discussing the trends resulted from the end of Dennard Scaling and Moore's Law. These trends include the transition towards parallel computer architectures and systems, the integration of specialized and heterogeneous components, and the emergence of new hardware and software systems.
Computer Organization (計算機組織) or equivalent knowledge are necessary.
Class Participation: 5% Paper Presentation/Project/Labs/Homework: ~45% Examinations: 2, ~50%
| 週次 | 主題 |
|---|---|
| 第 1 週 | Course overview and ISA recap |
| 第 2 週 | Pipeline and memory hierarchy review |
| 第 3 週 | Superscalar I |
| 第 4 週 | Superscalar II |
| 第 5 週 | VLIW |
| 第 6 週 | Super-pipelining and branch prediction |
| 第 7 週 | Advanced caches |
| 第 8 週 | Midterm exam and final project proposal |
| 第 9 週 | Memory management |
| 第 10 週 | Multithreading |
| 第 11 週 | Vector processors and GPUs |
| 第 12 週 | Parallel programming |
| 第 13 週 | Small multiprocessors |
| 第 14 週 | Interconnect and large multiprocessors |
| 第 15 週 | Emerging architectures |
| 第 16 週 | Final Exam Paper/Project Presentation |
| 第 17 週 | Paper/Project Presentation |
| 第 18 週 | Paper/Project Presentation |
John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, 6th Ed., Morgan Kaufmann Publishers.