進階電子設計自動化
Advanced EDA Topics
| 節 | 週三 |
|---|---|
5 13:20–14:10 | 進階電子設計自動化 ED202 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
This course will explore a wide spectrum of advanced EDA topics that span from fundamental geometric data structures for chip layouts to emerging trends in hardware security. It covers several important topics, including large-scale ECO routing, RDL routing in 3D ICs , optical routing in NoCs, analog layout synthesis, DFM and hotspot detection, advanced logic synthesis and verification, and EDA for hardware security. This course adopts a holistic approach, combining theoretical knowledge with practical implementation. Programming assignments, group projects, and case studies will provide you with a practical understanding of the concepts discussed in the lectures.
Python/C/C++ programming (mandatory), Data structures (nice to have), Algorithms or AI/ML (nice to have), VLSI design (nice to have), Introduction to EDA (nice to have)
Programming labs 60% Quiz/Exam 20% Term project 20%
- Geometric data structures for chip layouts
- Large-scale ECO routing
- RDL routing in 3D ICs
- Optical routing in NoCs
- Analog layout synthesis
- Layout synthesis with FinFETs
- DFM & Hotspot detection
- Advanced logic synthesis and verification
- EDA for Hardware security
- Introduction
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction |
| 第 2 週 | Geometric data structures for chip layouts KD-tree, R-tree, Cornerstitching, Voronoi diagram, Delaunay triangulation |
| 第 3 週 | Geometric data structures for chip layouts KD-tree, R-tree, Cornerstitching, Voronoi diagram, Delaunay triangulation |
| 第 4 週 | Large-scale ECO routing |
| 第 5 週 | Large-scale ECO routing |
| 第 6 週 | RDL routing in 3D ICs |
| 第 7 週 | RDL routing in 3D ICs |
| 第 8 週 | Optical routing for NoCs |
| 第 9 週 | Optical routing for NoCs |
| 第 10 週 | Analog layout synthesis Circuit structure analysis, analog placement, analog routing, P&R for RFICs |
| 第 11 週 | Analog layout synthesis Circuit structure analysis, analog placement, analog routing, P&R for RFICs |
| 第 12 週 | Analog layout synthesis Circuit structure analysis, analog placement, analog routing, P&R for RFICs |
| 第 13 週 | Layout synthesis with FinFETs |
| 第 14 週 | DFM & Hotspot detection |
| 第 15 週 | Advanced logic synthesis and verification |
| 第 16 週 | EDA for Hardware security |
Refence books: 1.Electronic Design Automation by Wang, Chang, and Cheng 2.Electronic design automation for IC implementation, circuit design, and process technology: circuit design, and process technology by Lavagno, Markov, Martin, and Scheffer
- 地點
- EF369 or Webex
- 時間
- By appointment
- 聯絡方式
- mphlin@nycu.edu.tw