校際選修

115-1 選課時程

進行中

  • 初選第一階段 6/15/2026
  • 初選第二階段 6/22/2026
  • 校際選修 8/24/2026
  • 初選第三階段 8/31/2026
  • 開學後加退選 9/7/2026
  • 逾期加退選 9/21/2026
選課資源

計算機組織

Computer Organization

學期
113-1
學分
3 學分
當期課號
555601
永久課號
CSCM30025
開課單位
國防資安管理碩士在職專班
授課教師
蔡文錦
校區
北門
類別
選修
上課時間表
週二
A
18:30–19:20
計算機組織
TB435
3 節連堂
B
19:30–20:20
C
20:30–21:20

* 根據陽明交大上課時間表所列

概述

This course introduces the basic hardware structure of a modern programmable computer. Students will learn how to design a processor, how to design large/fast memory and storage systems, and understand why an integration of them (processor, memory, storage, etc) performs as a modern computer does.

先修科目

Digital Circuit Design (數位電路設計) RTL implementation with Verilog HDL

評分方式

Exams: 60% (3 exams) Term Project: 25% (4-5 parts + 1 demo) Participation/Quizzes: 15%

課程大綱
  • Ch1. Computer Abstractions and Technology
  • Ch2. Instructions: Language of the Computer
  • Ch3. Arithmetic for Computers
  • Ch4. The Processor
  • Ch5. Exploiting Memory Hierarchy
  • Ch6. Parallel Processors from Client to Cloud
週次計畫
週次主題
第 1 週Computer Abstractions and Technology - Technology trend - Performance measure
第 2 週Instructions: Language of the computer - Arithmetic operations - Load and store operations
第 3 週Instructions: Language of the computer - Logic operations - Branch operations
第 4 週Arithmetic for Computers - Addiction and subtraction - Multiplication
第 5 週Arithmetic for Computers - Multiplication - Division
第 6 週Arithmetic for Computers - Floating point
第 7 週Midterm exam
第 8 週The Processor: Datapath and Control - ALU - Single-cycle CPU
第 9 週Enhancing Performance with Pipelining - Basics of pipeline CPU
第 10 週Enhancing Performance with Pipelining - data hazard - control hazard
第 11 週Enhancing Performance with Pipelining - control hazard - instruction-level parallelism
第 12 週Exploiting Memory Hierarchy - Basics of cache - Cache performance measuring
第 13 週Exploiting Memory Hierarchy - Improving cache performance 1. Direct mapping cache 2. Set associative cache
第 14 週Exploiting Memory Hierarchy - virtual memory
第 15 週Multiprocessors and Clusters - Multiprocessor - Parallelism performance - Vector architecture - Multithreading - Cluster
第 16 週Final exam
第 17 週
第 18 週
教科書

David A. Patterson and John L. Hennessy, Computer Organization and Design - The Hardware/Software Interface, 5th Edition, Morgan Kaufmann, 2009

Office Hours
地點
EC710
聯絡方式
Tel: 54816 (校內分機) E-mail: wjtsai@nctu.edu.tw