數位電路設計
Digital Circuit Design
學期
113-1
學分
3
學分
當期課號
910370
永久課號
SESE10050
開課單位
系統工程與科技學士學位學程
授課教師
陳丙堃
類別
必修
上課時間表
| 節 | 週三 |
|---|---|
A 18:30–19:20 | 數位電路設計 3 節連堂 |
B 19:30–20:20 | |
C 20:30–21:20 |
* 根據陽明交大上課時間表所列
概述
Let students understand the design principles of the components in the internal architecture of computer including: 1.Kinds of Basic Logic Gates. 2.Circuit Optimization. 3.Additional Gates and Circuits. 4.The design of Combinational Logic. 5.Arithmetic Functions. 6.Storage Elements and Analysis. 7.Sequential Circuit Design. 8.Registers. 9.Registers and Register Transfers. 10.Memory Basics Memory definitions.
評分方式
1.作業滿分120 >100以100計 2.每個作業的得分=作業分數*了解程度*百分比 例如作業分數80、組員4人、2人完全了解、1人了解50%、1人完全不了解,則本作業得分80*2.5/4*百分比;不了解同學經警告未改進者酌予扣分但不超過該作業得分 3.上課玩遊戲、玩手機(-20) 4.上課睡覺超過10分鐘或大聲吆喝(-5) 5.與上課無關的上網如youtube,FB,NBA等(-10) 6.手機未收起來 以上違規1次同組同學不加分;全班違規4次及以上全班不加分;全學期未扣分未違規組別老師酌予加分
週次計畫
| 週次 | 主題 |
|---|---|
| 第 1 週 | week1: Ch1.Digital System and Information |
| 第 2 週 | week2: Ch2.Combinational Logic Circuits-Part 1 – Gate |
| 第 3 週 | week3: Ch2.Combinational Logic Circuits-Part 2 – Circuit Optimization |
| 第 4 週 | week4: Ch2.Combinational Logic Circuits-Part 3 – Additional Gates and Circuits |
| 第 5 週 | week5: Ch3.Combinational Logic Design-Part 1 – Design |
| 第 6 週 | week6: Ch3.Combinational Logic Design-Part 2 – Combinational Logic |
| 第 7 週 | week7: Ch4.Arithmetic Functions and HDLs |
| 第 8 週 | week8: Ch5.Sequential Circuits-Part 1 - Storage Elements and Analysis |
| 第 9 週 | week9: Ch5.Sequential Circuits-Part 2- Sequential Circuit Design |
| 第 10 週 | week10: Ch5.Sequential Circuits-Part 3 – State Machine Design |
| 第 11 週 | week11: Ch6.Selected Design Topics-Part 1 – The Design Space week12: Ch6.Selected Design Topics- Part 2 Propagation Delay and Timing |
| 第 12 週 | week12: Ch6.Selected Design Topics- Part 2 Propagation Delay and Timing |
| 第 13 週 | week13: Ch6.Selected Design Topics- Part 3 Asynchronous Interactions |
| 第 14 週 | week14: Ch6.Selected Design Topics- Part 4 Programmable Implementation Technologies |
| 第 15 週 | week15: Ch7.Registers and Register Transfers- Part 1 Registers |
| 第 16 週 | week16: Ch7.Registers and Register Transfers- Part 2 Counters, Register Cells, Buses, & Serial Operations week17: Ch7.Registers and Register Transfers- Part 3 Control of Register Transfers week18: Ch8.Memory Basics Memory definitions |
教科書
教科書 講義