記憶體系統
Memory Systems
| 節 | 週二 |
|---|---|
5 13:20–14:10 | 記憶體系統 EE220 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
This course provides an in-depth exploration of memory systems from multiple perspectives, including circuit design, memory architecture, and their interactions with computer systems and programs.
Logic design / digital circuit Computer organization / computer architecture Basic C / C++ programming (Microelectronics is not mandatory but preferable.)
Teaching with slides provided on the E3 platform.
Homework + Quiz: 50% Final project/exam: 40% In-class Performance: 10%
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction + Computer System Overview |
| 第 2 週 | Memory Circuits (I) |
| 第 3 週 | Memory Circuits (II) |
| 第 4 週 | Machine Instructions and Memory Space Organization (I) |
| 第 5 週 | Machine Instructions and Memory Space Organization (II) |
| 第 6 週 | Machine Instructions and Memory Space Organization (III) |
| 第 7 週 | Processes and Shared-memory Model |
| 第 8 週 | Processes and Shared-memory Model (con't) |
| 第 9 週 | Memory Hierarchy |
| 第 10 週 | Cache Memories |
| 第 11 週 | Virtual Memory |
| 第 12 週 | Main Memory System |
| 第 13 週 | Main Memory System (con't) + Flash Memory and Solid-State Drives |
| 第 14 週 | Flash Memory and Solid-State Drives (con't) |
| 第 15 週 | Final Presentation |
| 第 16 週 | Final Presentation (con't) |
B. Jacob et al, "Memory Systems- Cache, DRAM and Disk", Morgan Kaufmann 2008. Kang, Leblebici and Kim, “CMOS Digital Integrated Circuits: Analysis and Design,” McGraw-Hill, 2015. Randal E. Bryant and David R. O'Hallaron, “Computer Systems: A Programmer's Perspective,” 3/e, Pearson 2015. J. Hennessy and D. Patterson, “Computer Architecture: A Quantitative Approach”, 6th ed., Morgan Kaufmann 2017.
- 地點
- By appointment
- 時間
- After class or by appointment (via email or the E3 system).
- 聯絡方式
- watchmannien@nycu.edu.tw