前瞻CMOS製程整合工程
Advanced CMOS Process Integration Engineering
學期
113-2
學分
3
學分
當期課號
539003
永久課號
IIPS30011
開課單位
前瞻半導體研究所
授課教師
林群雄、林義雄、陳建宏、陳俊光
校區
光復
類別
選修
上課時間表
| 節 | 週五 |
|---|---|
5 13:20–14:10 | 前瞻CMOS製程整合工程 A305 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
概述
A qualified process integration engineer requires to possess interdisciplinary knowledge across advanced CMOS device physics, semiconductor fabrication process, and basic CMOS device/standard cell/SRAM designs. Yield enhancement and reliability qualification are also important functional areas. The goal of this course is to provide the comprehensive and practical approaches to introduce the aforementioned subjects with sufficient depth for students interested in the process integration engineering (PIE) by lecturers from industry.
先修科目
Semiconductor Device and Physics (Required); Basic knowledge in CMOS circuits (Preferred)
教學方式
上課為保障智慧財產權,不得照相、錄音或錄影。
評分方式
Mid-Term Exam 50% Final Exam 50%
週次計畫
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction |
| 第 2 週 | Holiday |
| 第 3 週 | Evolution of CMOS devices |
| 第 4 週 | Fundamental Process Introduction |
| 第 5 週 | Gate, Standard cells and SRAM Cells |
| 第 6 週 | Device Engineering |
| 第 7 週 | Holiday (On-line: Fabrication processes of advanced CMOS I) |
| 第 8 週 | Device Engineering +Mid Term Exam |
| 第 9 週 | Device Engineering |
| 第 10 週 | Device Engineering+Fabrication processes of advanced CMOS (II) |
| 第 11 週 | Lithography/Patterning Technology+Fabrication processes of advanced CMOS (II) |
| 第 12 週 | Lithography/Patterning Technology |
| 第 13 週 | Yield Enhancement & Process Defects |
| 第 14 週 | Product Development Cycle: Ultra Low Power Technology |
| 第 15 週 | Holiday |
| 第 16 週 | Final Exam |
教科書
課程講義
Office Hours
- 時間
- By appointment