校際選修

115-1 選課時程

進行中

  • 初選第一階段 6/15/2026
  • 初選第二階段 6/22/2026
  • 校際選修 8/24/2026
  • 初選第三階段 8/31/2026
  • 開學後加退選 9/7/2026
  • 逾期加退選 9/21/2026
選課資源

半導體構裝和異質整合技術

Semiconductor packaging and Heterogeneous Integration Technology

學期
113-2
學分
1 學分
當期課號
539007
永久課號
IIPS30026
開課單位
前瞻半導體研究所
授課教師
陳俊豪
校區
光復
類別
選修
上課時間表
週二
A
18:30–19:20
半導體構裝和異質整合技術
A305
2 節連堂
B
19:30–20:20

* 根據陽明交大上課時間表所列

概述

For this course; 1. Introduce the essential technologies used in semiconductor packaging including substrates (organic, silicon, glass), interconnection technology (wire bonding, flip chip, solders), and system electrical and thermal requirements. 2. heterogeneous integration technology; chiplets and technology such as CoWoS-X and EMIB process. Optical connection CPO. Use examples of server packaging such as NVidia H200 and B200 and Apple InFO and MX

先修科目

Basic Semiconductor, Physics, chemistry, and material science knowledge.

評分方式

作業10%,期中考(OPEN BOOK)45%,期末報告45%

週次計畫
週次主題
第 1 週Introduction to semiconductor packaging Overview of semiconductor packaging Its importance and applications Current Trends and Future Directions Introduction to Heterogeneous Integration Overview of Heterogeneous Integration Its Importance and AI Applications Current Trends and Future Directions
第 2 週
第 3 週Electrical Design and Characterization (1) Electrical requirements in system design Electrical Interconnects and Signal Integrity Electrical Design and Characterization (2) Electrical Interconnects and Signal Integrity Power Delivery Networks Chiplets
第 4 週
第 5 週Substrate in electronic packaging (1) Organic substrate Organic Material and process Glass substrate Substrate in electronic packaging (2) Silicon interposer TSV process and CoWoS
第 6 週
第 7 週Interconnection technology (1) Wire bonding Solder connection Flip Chip Interconnection technology (2) Copper-to-copper direct bonding Wafer-to-wafer bonding Die-to-wafer bonding
第 8 週
第 9 週(1) Mid term examine 1Hr. (2)RDL and integration of substrate Technology Fan-in and Fan-out WLP 2.XD integrated substrate structure and process
第 10 週
第 11 週Electronic packaging modeling Electronic Packaging Process simulation Digital twin Thermal Design and Management Thermal Challenges in Heterogeneous Integration Thermal Interface Materials Cooling Solutions and Thermal Management Strategies
第 12 週
第 13 週Reliability in the electronic system Reliability testing spec and method System reliability Optical electronic packaging Introduction to optical-electronic packaging Components in CPO Future trend of CPO
第 14 週
第 15 週(1)Leading electronic packaging applications and HI systems NVidia H200 and B200 for servers Apple InFO and MX die-to-die integration Tesla Dojo Emerging packaging technology and the future of HI technology (2) Final report
第 16 週
教科書

1. Advanced Electronic Packaging, Richard K. Ulrich; William D. Brown, Wiley-IEEE Press, 2006 2. Flip Chip, Hybrid Bonding, Fan-In and Fan-out Technology, John H. Lau, Springer Nature Singapore, 2024

Office Hours
聯絡方式
hu@si2plus.com