VLSI實驗
VLSI Labs.
學期
114-1
學分
3
學分
當期課號
515112
永久課號
EEEC20004
開課單位
電機工程學系
授課教師
闕河鳴、張錫嘉
類別
選修
上課時間表
| 節 | 週五 |
|---|---|
5 13:20–14:10 | VLSI實驗 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
概述
This lab class is an appendix of "Introduction to VLSI Design". Student who enroll in this lab must formerly took "Introduction to VLSI Design" or is taking "Introduction to VLSI Design" simultaneously.
先修科目
Digital Logic Design, Circuit Theory, Microelectronics
教學方式
VLSI實驗
評分方式
The grading policy will be announce in the first meeting of the class.
週次計畫
| 週次 | 主題 |
|---|---|
| 第 1 週 | Introduction to class + EDA environment setting |
| 第 2 週 | Digital Circuit + Introduction to simulation tool 【Lab#1】 1-bit Full-Adder + DFF (Hspice) |
| 第 3 週 | CMOS Technology + Introduction to Layout tool 【Lab#2】 1-bit Full-Adder + DFF (Layout) |
| 第 4 週 | Lab#1 Demo + Lab#2 Discussion |
| 第 5 週 | Schematic Level Design + Logic Effort 【Lab#3】 4-bit Full-Adder + DFF |
| 第 6 週 | 國慶放假 |
| 第 7 週 | Lab#2 Demo + Lab#3 Discussion |
| 第 8 週 | 光復節補假 |
| 第 9 週 | 【Online Test】+ Lab#3 Demo |
| 第 10 週 | Array, Recoded, and Booth Multiplier 【Lab04】 6-bit Booth Encoder |
| 第 11 週 | Lab#4 Discussion |
| 第 12 週 | Cell-based Design + Introduction to Verilog (Architecture Design + MAC + Logic Synthesis) 【Lab#5】6-bit Multiplier and Accumulator |
| 第 13 週 | Lab#4 Demo 【Final Project】Pipeline MAC Design (Team work) Lab#5 Discussion |
| 第 14 週 | Lab#5 Demo |
| 第 15 週 | Final Project Discussion |
| 第 16 週 | 【Final Exam】 |
| 第 17 週 | Bonus ADFP lecture |
| 第 18 週 | Final Project Demos Bonus ADFP Discussion |
教科書
There are no text book, lab material will be available in E3 System.
Office Hours
- 地點
- ED420b or online
- 時間
- Friday 12:00-1:20pm (by appointment)
- 聯絡方式
- hcchang@mail.nctu.edu.tw