邏輯設計與FPGA
Logic Design and Field Programmable Gate Array
學期
114-1
學分
3
學分
當期課號
520019
永久課號
XDEP20023
開課單位
學士後電子與光子學士學位學程
授課教師
林尚亭
校區
光復
類別
選修
上課時間表
| 節 | 週四 |
|---|---|
5 13:20–14:10 | 邏輯設計與FPGA SC160 3 節連堂 |
6 14:20–15:10 | |
7 15:30–16:20 |
* 根據陽明交大上課時間表所列
概述
This course offers an introduction to any undergraduate who wants to understand digital logic design and FPGA design flow. This course is essential for later courses in digital system design, computer architecture, and design automation.
評分方式
Homework and Quiz: 40%; Midterm Exam: 30%; Final Exam or Project: 30%
週次計畫
| 週次 | 主題 |
|---|---|
| 第 1 週 | Course introduction, Number System and Conversion |
| 第 2 週 | Boolean Algebra |
| 第 3 週 | Applications of Boolean Algebra |
| 第 4 週 | Karnaugh Maps and Multi-Level Gate Circuits |
| 第 5 週 | Combinational Circuit Design |
| 第 6 週 | Multiplexers, Decoders, and Programmable Logic Devices |
| 第 7 週 | FPGA Design Flow |
| 第 8 週 | Midterm Exam |
| 第 9 週 | Introduction to VHDL |
| 第 10 週 | VHDL Concurrent Codes |
| 第 11 週 | Latches and Flip-Flops |
| 第 12 週 | Registers and Counters |
| 第 13 週 | Sequential Circuit Design |
| 第 14 週 | VHDL for Sequential Logic |
| 第 15 週 | VHDL Simulation - ModelSim |
| 第 16 週 | Final Exam or Project |
教科書
1. C. H. Roth, Jr., Fundamentals of Logic Design, 7th edition, Thomson, 2020 2. Class notes.