計算機架構
Computer Architecture
| 節 | 週二 |
|---|---|
5 13:20–14:10 | 計算機架構 EDB27 2 節連堂 |
6 14:20–15:10 |
* 根據陽明交大上課時間表所列
The slowdown of transistor scaling has led to diminishing performance improvements in standard computer systems. With the loss of exponentially increasing resources provided by semiconductor scaling, computer architects are facing significant challenges in maintaining the growth of computing power. This course begins with an introduction to advanced topics in conventional computer architecture and then explores the trends resulting from the end of Dennard Scaling and Moore's Law. These trends include the shift towards parallel computer architectures and systems, the integration of specialized and heterogeneous components, and the emergence of new hardware and software systems.
Computer Organization (計算機組織) or equivalent knowledge are necessary.
Labs: ~50% Examinations: 2, ~50%
| 週次 | 主題 |
|---|---|
| 第 1 週 | Course overview and ISA recap |
| 第 2 週 | Pipeline and memory hierarchy review |
| 第 3 週 | Superscalar I |
| 第 4 週 | Superscalar II |
| 第 5 週 | VLIW |
| 第 6 週 | Super-pipelining and branch prediction |
| 第 7 週 | Advanced caches |
| 第 8 週 | Midterm |
| 第 9 週 | Memory management |
| 第 10 週 | Multithreading |
| 第 11 週 | Vector processors and GPUs |
| 第 12 週 | Parallel programming |
| 第 13 週 | Small multiprocessors |
| 第 14 週 | Interconnect and large multiprocessors |
| 第 15 週 | Emerging architectures |
| 第 16 週 | Final |
John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach, 6th Ed., Morgan Kaufmann Publishers.