計算機組織
Computer Organization
| 節 | 週一 | 週四 |
|---|---|---|
2 09:00–09:50 | 計算機組織 EC115 | |
5 13:20–14:10 | 計算機組織 EC115 2 節連堂 | |
6 14:20–15:10 |
* 根據陽明交大上課時間表所列
This course aims to introduce the computer organization that includes CPU, memory, and cache. The Intended Lecture Outcomes (ILOs) is shown below. 1. Learn the great ideas of computer design and implementation 2. Learn the design and formats of RISC-V instruction set 3. Understand the detail of the pipelining CPU processor organization 4. Introduce the memory hierarchies (DRAM and Cache) 5. Implement a simple RISC-V CPU architecture
C programming, digital system design, and verilog programming
5 labs (30 %) 2 exams (60 %) 2 quiz (10%) https://people.cs.nycu.edu.tw/~ttyeh/course/2026_Spring/CS10014/outline.html https://github.com/nycu-caslab/CO2026
| 週次 | 主題 |
|---|---|
| 第 1 週 | ISA I |
| 第 2 週 | ISA II |
| 第 3 週 | Arithmetic of Computer |
| 第 4 週 | Performance |
| 第 5 週 | Processor |
| 第 6 週 | Spring Break |
| 第 7 週 | Pipelined Processor |
| 第 8 週 | Midterm |
| 第 9 週 | Branch Predictor |
| 第 10 週 | Cache I |
| 第 11 週 | Cache II |
| 第 12 週 | Virtual Memory |
| 第 13 週 | Superscalar + OoO |
| 第 14 週 | Parallel Processors |
| 第 15 週 | GPU |
| 第 16 週 | Final Exam |
David A. Patterson, John L. Hennessy, Computer Organization and Design Risc-V Edition: The Hardware Software Interface, Morgan Kaufmann, 2/e
- 時間
- TBA
- 聯絡方式
- ttyeh@cs.nycu.edu.tw