實體設計自動化

This course introduces the principles, algorithms, and practical tools used in VLSI physical design automation, a critical stage of modern integrated circuit (IC) design. The course focuses on transforming a synthesized gate-level netlist into a manufacturable physical layout while meeting performance, power, and area constraints. Key topics include partitioning, floorplanning, placement, clock tree synthesis, routing, design for manufacturability (DFM), and 3D IC integration, with emphasis on optimization techniques and algorithmic foundations. Students will study timing closure, power integrity, signal integrity, and variability-aware design in advanced technology nodes.

C / C++ / Python Programming Data structures Algorithms Logic design (nice to have) VLSI design (nice to have)

Algorithms for VLSI Physical Design Automation, 3/e (Hardcover) https://nycu.primo.exlibrisgroup.com/permalink/886UST_NYCU/564rer/alma990001001020206772 VLSI Physical Design: From Graph Partitioning to Timing Closure https://nycu.primo.exlibrisgroup.com/permalink/886UST_NYCU/cqntog/cdi_askewsholts_vlebooks_9783030964153

Programming Assignments (60%) Midterm (20%) Final Exam (20%)

• Complexities & Algorithms
• Partitioning
• Floorplanning
• Placement
• Routing
• DFM and 3D IC
• Introduction

Reference books: S. H. Gerez, Algorithms for VLSI Design Automation, John Wiley & Sons, 1999 L.-T. Wang, Y.-W. Chang, and K.-T. Cheng, Electronic Design Automation: Synthesis, Verification, and Test (Systems on Silicon), Morgan Kaufmann, 2009. L. Lavagno, I. Markov, and G. Martin, L. Scheffer, Electronic Design Automation for IC System Design, Verification, and Testing, CRC, 2nd Ed., 2016. Sait and Youssef, VLSI Physical Design Automation: Theory and Practice, World Scientific Publishing Co., 1999

地點

EF369

時間

By appointment

聯絡方式

mphlin@nycu.edu.tw